Skip to content

CV32E40Pv2 CORE-V SIMD Update

Created by: NandniJamnadas

  • gcc/config/riscv/constraints.md: Renamed const_int2_operand to const_int2_simd_operand.
  • gcc/config/riscv/corev.md: Renamed const_int2_operand to const_int2_simd_operand.
  • gcc/config/riscv/predicates.md: Changing layout of CORE-V Predicates.
  • gcc/doc/extend.texi: Changing layout of CORE-V Built-in Documentation.

Merge request reports

Loading