Explore projects
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This is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
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OpenHW Group / backup-20250511 / apb_interrupt_cntrl
Apache License 2.0Small and simple APB interrupt controller
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OpenHW Group / backup-20250511 / cva6
Apache License 2.0The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
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Run an AWS CodeBuild project as a step in a GitHub Actions workflow job.
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OpenHW Group / backup-20250511 / cv32e41p
Apache License 2.04 stage, in-order, secure RISC-V core based on the CV32E40P with Zfinx and Zce ISA extentions
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OpenHW Group / backup-20250511 / core-v-sdk
Eclipse Public License 2.0Updated -
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OpenHW Group / backup-20250511 / cve2
Apache License 2.0The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.
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CV32E40X Design-Verification environment
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Eclipse/FreeRTOS/core-v-mcu example program
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OpenHW Group / backup-20250511 / cv32e40p
Apache License 2.0CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
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This is the CORE-V MCU DevKit project, hosting the open-source artifacts for the CORE-V MCU Development Kit.
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