Skip to content
GitLab
Explore
Sign in
Open
1
Merged
653
Closed
33
All
687
Merge trains
Recent searches
Loading
{{ formattedKey }}
{{ title }}
{{ help }}
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
None
Any
{{name}}
@{{username}}
{{name}}
@{{username}}
None
Any
Upcoming
Started
{{title}}
None
Any
{{title}}
None
Any
{{title}}
None
Any
{{name}}
Yes
No
Yes
No
{{title}}
{{title}}
{{title}}
Updated date
#621 Bounded response check: print details about edges enabled in cycles
!1142
· created
Nov 13, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Merged
1
Approved
updated
Nov 14, 2024
#1055 PLCgen: Fix warning for reference in JavaDoc to renamed field.
!1141
· created
Nov 13, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Bug
Merged
1
Approved
updated
Nov 14, 2024
#1055 PLCgen: Construct POUs for input and/or output on request.
!1143
· created
Nov 14, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Bug
Merged
29
Approved
updated
Nov 19, 2024
#1022 PLCgen: Move the model overview to the end of the main file
!1145
· created
Nov 18, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Enhancement
Merged
6
Approved
updated
Nov 19, 2024
#1022 PLCgen: Fix expected output of the new 1055 test-case.
!1148
· created
Nov 19, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Enhancement
Merged
2
Approved
updated
Nov 19, 2024
#621 Bounded response check prints cycle states in check result details.
!1144
· created
Nov 17, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Merged
21
Approved
updated
Nov 19, 2024
#1066 Fix typo in cif2supremica ElimEnumsOption description
!1149
· created
Nov 19, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Bug
Merged
Approved
updated
Nov 20, 2024
#679 PLCgen: Remove S7-300/400 specific remarks about type unification in exprgen
!1151
· created
Nov 21, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Enhancement
Merged
1
Approved
updated
Nov 21, 2024
#738 Cleanup and move some small steps in multilevel synthesis
!1150
· created
Nov 20, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Enhancement
Merged
24
Approved
updated
Nov 21, 2024
SBE course: add Module 6 (archived attempt)
!1155
· created
Nov 24, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Closed
updated
Nov 24, 2024
#1061 PLCgen: Enable S7 name restrictions for all Siemens PLC models.
!1157
· created
Nov 27, 2024
by
Albert Hofkamp
CIF
Type
Bug
Merged
5
Approved
updated
Nov 27, 2024
#227 CIF code generator for HTML now supports SVG input mappings with updates + related improvements/fixes
!1153
· created
Nov 23, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Merged
15
Approved
updated
Nov 29, 2024
#1081 CIF 'bridge' synthesis example: fix duplicate section name.
!1162
· created
Nov 30, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Bug
Merged
Approved
updated
Nov 30, 2024
#952 CIF code generator: 'event' to 'edge' in generator and generated code.
!1039
· created
Aug 15, 2024
by
Dennis Hendriks
v5.0
CIF
Type
Enhancement
Merged
4
updated
Nov 30, 2024
#715 CIF codegen: by default, generate HTML, not Simulink code.
!1164
· created
Nov 30, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Bug
Merged
Approved
updated
Nov 30, 2024
#1069 CIF HTML codegen: runtime error if SVG input event mapping is incomplete.
!1163
· created
Nov 30, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Bug
Merged
2
Approved
updated
Dec 01, 2024
#742 SBE course: finalized first version (only 5 modules, other improvements)
!1156
· created
Nov 26, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Merged
26
updated
Dec 01, 2024
#1067 Add CIF to CIF transformation to convert a specification to its interface
!1152
· created
Nov 21, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Merged
116
updated
Dec 02, 2024
#1039 PLCgen: Also consider the input/output code form for storing state.
!1166
· created
Dec 02, 2024
by
Albert Hofkamp
v6.0
CIF
Type
Bug
Merged
Approved
updated
Dec 02, 2024
#1084 CIF code generator: automatically make the default code prefix a valid identifier
!1165
· created
Dec 01, 2024
by
Dennis Hendriks
v6.0
CIF
Type
Enhancement
Merged
Approved
updated
Dec 02, 2024
Prev
1
…
30
31
32
33
34
35
Next
